Wednesday, October 28th 2026
TSMC Could Charge Up to 20% More for CoWoS Packaging Amid AI Crunch
TSMC is reportedly considering raising prices for its CoWoS (Chip on Wafer on Substrate) advanced packaging by as much as 20%, according to supply chain sources cited by Taiwan's Commercial Times. Foundries and outsourced packaging firms are apparently weighing another round of 10% to 20% increases, as CoWoS demand has spread beyond AI GPUs to server CPUs and custom ASICs, leaving a growing backlog of unfilled orders. TSMC hasn't confirmed anything yet.
Testing is turning into a bottleneck of its own. Nomura estimates, via Seoul Economic Daily, that NVIDIA's Blackwell takes roughly four times longer than Hopper in final testing, while Rubin could need seven times as long. Packages keep growing too, with TSMC already mass producing CoWoS-L at 5.5 times the reticle limit. Tool lead times have reportedly stretched from three to six months to as long as eight months. TSMC, which usually negotiates for discounts or extra features, apparently placed this year's equipment orders at existing prices instead, which says a lot about how tight things are.Liberty Times also reports that TSMC has finalized plans for 3% to 6% wafer price increases from January 2027, with 2 nm and 3 nm seeing the steepest hikes. Some packaging relief is coming, just not soon. GlobalFoundries reportedly signed a five-year, $2 billion deal to make CoWoS silicon interposers in New York, with volume production expected to ramp in the first half of 2028. At the moment this is mostly a data center problem, since gaming graphics cards don't use CoWoS, though pricier wafers will probably reach consumer chips eventually.
Sources:
Commercial Times, Seoul Economic Daily, Liberty Times, via TrendForce
Testing is turning into a bottleneck of its own. Nomura estimates, via Seoul Economic Daily, that NVIDIA's Blackwell takes roughly four times longer than Hopper in final testing, while Rubin could need seven times as long. Packages keep growing too, with TSMC already mass producing CoWoS-L at 5.5 times the reticle limit. Tool lead times have reportedly stretched from three to six months to as long as eight months. TSMC, which usually negotiates for discounts or extra features, apparently placed this year's equipment orders at existing prices instead, which says a lot about how tight things are.Liberty Times also reports that TSMC has finalized plans for 3% to 6% wafer price increases from January 2027, with 2 nm and 3 nm seeing the steepest hikes. Some packaging relief is coming, just not soon. GlobalFoundries reportedly signed a five-year, $2 billion deal to make CoWoS silicon interposers in New York, with volume production expected to ramp in the first half of 2028. At the moment this is mostly a data center problem, since gaming graphics cards don't use CoWoS, though pricier wafers will probably reach consumer chips eventually.


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