Micron has decided not to bring 4F² DRAM to market, even though it says it invented the cell design and has been researching it for around two decades. Scott DeBoer, Micron's President and Chief Technology and Products Officer, shared the decision during the company's technology webinar on October 21. On paper, 4F² uses vertical channel transistors to shrink each memory cell's footprint by about a third compared with the 6F² layout used in today's DRAM. However, DeBoer argued that real-world density is limited by how closely the capacitors can be packed, not by the cell's footprint, calling the density advantage over 6F² "a bit of a myth." He also said 4F² can be built, but at a higher cost and complexity, and that it runs into fundamental scaling problems at leading-edge nodes, which points toward 3D DRAM instead.

That puts Micron at odds with its rivals. Samsung and SK hynix are both developing 4F² designs, and China's CXMT says its first 4F² product will be a server DDR5 RDIMM due by the end of this year. Micron will keep scaling 6F² instead, with its 1-delta node set to ramp in Boise, Idaho, in the second half of 2027 and the 1-epsilon node after it moving to wafer bonding. 3D DRAM is being developed as a parallel path, but there's no timeline yet, and Micron says it will only switch once the economics make sense. It's a risky bet if rivals manage to make 4F² cheap at scale, especially with memory supply expected to get even tighter in 2027 and 2028, per Micron's own estimates.