Tuesday, November 5th 2019

Intel CFO Talks About 7nm Rollout, Delay in 10nm, Increased Competition from AMD

Intel CFO George Davis in an interview with Barron's commented on the company's financial health, and some of the reasons behind its rather conservative gross margin guidance looking forward to at least 2023. Intel's current product stack is moving on to the company's 10 nm silicon fabrication process in a phased manner. The company is allocating 10 nm to mobile processors and enterprise processors, while brazening it out with 14 nm on the client-desktop and HEDT platforms until they can build 10 nm desktop parts. AMD has deployed its high-IPC "Zen 2" microarchitecture on TSMC's 7 nm DUV process, with plans to go EUV in the coming months.

"We're still keenly focused on gross margin. Everything from capital efficiency to the way we're designing our products. What we've said though, the delay in 10 nanometer means that we're going to be a little bit disadvantaged on unit cost for a period of time. We actually gave guidance for gross margin out in 2021 to help people understand. 2023 is the period that we were ultimately guiding [when] we're going to see very strong revenue growth and margin expansion. We've got to get through this period where we have the 10 nanometer being a little bit late [as] we're not optimized on a node that we're on. But [by] then we're moving to a two to two and a half year cadence on the next nodes. So we're pulling in the spending on 7 nanometer, which will start up in the second half of 2021 because we think it's the right thing to do competitively," he said.
Davis and Barron's also spoke about Intel's 7 nm rollout plans. Davis stated that Intel's 7 nm silicon fabrication node is expected to begin mass-production of chips only by the second half of 2021. Barron's then turned the discussion to AMD and the traction its EPYC "Rome" server processors are gaining with enterprises. "We said we expect to have heightened competition over the next 18 to 24 months. And our outlook reflects that. Our view on the nature of that competition and impact hasn't really changed since we gave [our] longer term forecast in May," he said. You can read the full Barron's interview from the source link. Source: Barron's
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50 Comments on Intel CFO Talks About 7nm Rollout, Delay in 10nm, Increased Competition from AMD

#26
ratirt
pjl321
I didn't explain that very well, you are right they can't click their fingers and change a chip that was designed for 10nm and now make it on 14nm. What I meant was Intel should have seen how bad things were with their 10nm and re-worked Ice Lake to work on 14nm. My understanding is that Intel has learnt this lesson and all architectures moving forward are cross node compatible, meaning if they did have an issue or shortage on a certain node they can use another node to plug the gap.
The problem with what you said is, that you don't know all the aspects of what Intel is planing, what is happening inside the company or what is the strategy. The only thing what you can be sure of is that Intel made the right choices for implementation since there is hundreds of people thinking about it and observing the market and opponents all the time. It is a huge company and the experience in the industry is there. What you are saying is based on the actual events that already happened. When Intel is planing this events are going to happen and that is the difference between us and Intel (or any other company in fact)
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#27
cyrand
ratirt
7nm is 7nm 5nm is 5nm what are you talking about?
Unfortunately this actually not the case. There are no standard rules for what 7nm or 5nm means when it comes to naming the process. Therefore it is partially driven by the marketing department. Figuring out actually performance between different processes is complicated and can be debated but for big picture estimate transistor density (MTr/mm2) is usually use.

For example if you look up 7nm in Wikipedia under the "7 nm Process nodes and process offering section. https://en.wikipedia.org/wiki/7_nanometer. You see Intel 10nm more dense then all the other companies none euv 7nm but the 7nm base on euv are more dense then intel 10nm. One of the mistakes Intel made was being way to aggressive in there 10nm process. They way trying to hit a density level 4 years ago that no other company even attempted until EUV was available and obviously in hind site was a massive failure for intel.
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#28
ratirt
cyrand
Unfortunately this actually not the case. There are no standard rules for what 7nm or 5nm means when it comes to naming the process. Therefore it is partially driven by the marketing department. Figuring out actually performance between different processes is complicated and can be debated but for big picture estimate transistor density (MTr/mm2) is usually use.

For example if you look up 7nm in Wikipedia under the "7 nm Process nodes and process offering section. https://en.wikipedia.org/wiki/7_nanometer. You see Intel 10nm more dense then all the other companies none euv 7nm but the 7nm base on euv are more dense then intel 10nm. One of the mistakes Intel made was being way to aggressive in there 10nm process. They way trying to hit a density level 4 years ago that no other company even attempted until EUV was available and obviously in hind site was a massive failure for intel.
The name 7nm node means size of transistors being manufactured at 7nm. The type of transistor for example MosFet (Metal Oxide Semiconductor Field Effect Transistor). So it is a size of a transistor. So if it says 7nm node (transistors size is 7nm) meaning 7nm not 3nm or 10nm. If you say 1 inch, it is 1 inch not 1inch and 1/4.
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#29
londiste
7nm, as well as other recent node names have nothing at all to do with actual physical size of anything in the transistor :)
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#30
eidairaman1
The Exiled Airman
kapone32
Fact: The last time AMD was faster than Intel; 2005
Fact: The last time Intel had to worry about AMD (Or anyone else for that matter) 2017

That is 12 years of complete dominance in marketing, sales and hardware. The other thing it can and has done is stagnate. I look at where Intel is today the same way I looked at Tahiti when it was finalized by ATI/AMD. That series of GPU was so popular and nice for the consumer that I am sure there are still a ton of people with 7950, 290,280,390 cards but what it did was stagnated the GPU division of AMD (by then) because they could not come up with anything better without a heavy investment of time, money and brain power (which became Polaris and eventually Navi). Intel is huge and I mean huge they have more foundries around the world than most of us are aware of. The problem with being that big is it will take Intel longer to respond to AMD's (well TSMC's) 7nm and so on as not only will they have to make changes to their current 14+++ but also try to refine the albatross that is 10nm. Unfortunately, based on the timeline provided by Mr Davis they may be too late to take the wind out of AMD's sails fully as we have been getting more concrete announcements from them. Every news article from Intel lately has been about promise and nothing more. They are simply not nimble enough to respond to AMD in even a year's time. I have zero doubts though that when Intel does release 10NM nad 7nm desktop parts they should absolutely fly but who knows where AMD will be then too.
Supposedly 2021 Ryzen 4/5 will be ddr5 and pcie 5/6.0
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#31
ppn
""Compared to N7, N5 is said to provide a compaction ratio of 1.84x. WikiChip estimates the poly pitch to be around 48 nm along with a 30-nanometer metal pitch for an estimate transistor density of 171.3 MT/mm². ""
""If Intel’s 7-nanometer node ramps as planned in 2021, we estimate it at around 237.18 MTr/mm², ""

Intel may decide to go with less dense 7nm, but who knows. 10nm is history now. Only suitable for chipsets in the not so distant future.

Of course 14nm is around 44 Mt/mm2. Does it mean die area will suddenly shrink to 20%, probably not.
We will never see 10nm in decent numbers, what would be the point, so the jump is made 14 to 7nm and ratio of compaction 4-5 times.
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#32
Aquinus
Resident Wat-man
btarunr
We said we expect to have heightened competition over the next 18 to 24 months. And our outlook reflects that.
Oof. If I hadn't already sold all of my Intel stock, I would have after hearing that.
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#33
cyrand
ratirt
The name 7nm node means size of transistors being manufactured at 7nm. The type of transistor for example MosFet (Metal Oxide Semiconductor Field Effect Transistor). So it is a size of a transistor. So if it says 7nm node (transistors size is 7nm) meaning 7nm not 3nm or 10nm. If you say 1 inch, it is 1 inch not 1inch and 1/4.
Find me one source that shows that any of the companies that calling there process 7nm acturally using a 7nm anything in there transitors. It dont meant what you think it does in how every company with a fab uses the term.
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#34
Mirkoskji
No one ever said Intel suddently became unable to design integrated chips. What happened is that their size-related inertia and dominant position made them react very slowly to a naturally fast changing market. Which i think cannot be seen as a positive aspect. Probably they have technology updates planned for the next 10 years, but if the reaction times are slow, and they go panic-mode when the unexpected happens, I don't see this as positive for an enteprise that seems so focused on profitability.
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#35
HD64G
They indirectly admit the failure of their 10nm process and promise better luck with their 7nm products from 2021 or later. 10nm will be sold only for mobile and low power CPUs, mostly for small servers. My 5c.
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#36
voltage
Just hurry with Tiger Lake, I don't ask for much in life. Sorry amd, i could care less about the current over the top hype of your come back, it took you long enough! I got burned by amd with their lies on bulldozer core count, and instability issues. Never again.
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#37
R-T-B
Vayra86
Until they can. Will they ever? Davis doesn't say, but we all know the answer.
No we don't. I mean, we can theorize until the cows come home, and we obviously are. None of us know and there are no hard statements from Intel to support this however.

That was my only point. If I had to bet, I would bet you are right. But I don't present bets as fact.

HD64G
mostly for small servers
Some of the prototyped 10nm dies are defintely not "small server" material.
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#38
AusWolf
I see all this press about nanometers as a pitiful way to hide the fact that they still have no clue how to improve on their x86 architecture after so many years. If all they can do is jam more cores on their old processors, give them a fancy new codename, and calling them "gamer" for no other reason than to convince gamers that they need these overpriced nonsenses, then I'll go with Ryzen for my next build. Until then I'm good with my Kaby i7 being 4-core and 14 nm and all.
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#39
Nkd
fancucker
Oh my goodness Intel is doomed! After Zen finally managed to equal skylake (CFL) and across three iterations and two major nodes. Ice lake is already demonstrating 18% IPC uplift and tiger even further. Behind the process problems genuine uarch dev continued. Zen 3 better be good.
Keep trolling. Please point me to CFL desktop gaming parts. Oh wait there are none! That’s what I thought. Move on.
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#40
Midland Dog
fancucker
Oh my goodness Intel is doomed! After Zen finally managed to equal skylake (CFL) and across three iterations and two major nodes. Ice lake is already demonstrating 18% IPC uplift and tiger even further. Behind the process problems genuine uarch dev continued. Zen 3 better be good.
id buy a tiger lake 14nm++++ part, 5ghz with potentially %30 more ipc than skylake oof
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#41
Assimilator
The biggest question has got to be - will Intel FUBAR 7nm like they did 10nm?
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#42
Vayra86
voltage
Just hurry with Tiger Lake, I don't ask for much in life. Sorry amd, i could care less about the current over the top hype of your come back, it took you long enough! I got burned by amd with their lies on bulldozer core count, and instability issues. Never again.
That was a decade ago. What are you, a Dwarf?
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#43
R-T-B
Nkd
CFL desktop gaming parts.
CFL? That's CoffeeLake, right? There are quite a few gaming parts from that.

Vayra86
That was a decade ago. What are you, a Dwarf?
He put it down in the book of grudges.
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#44
ratirt
cyrand
Find me one source that shows that any of the companies that calling there process 7nm acturally using a 7nm anything in there transitors. It dont meant what you think it does in how every company with a fab uses the term.
You have it on the TSMC site for instance. Go there and educate yourself. You're asking me to find you a source and prove to you that 1inch is actually 1inch on the tape-meter not 2 inches. 7nm process meaning 7nm transistors. What is to discuss here? Size of a transistor 7nm and yet you want source for this? Holy crap on a cracker. :)

londiste
7nm, as well as other recent node names have nothing at all to do with actual physical size of anything in the transistor
Actually it has everything to do with the transistor itself not what's in the transistor.
The problem appears with the space between transistors. That is why you have EUV, DUV etc. techniques to connect the transistor together which is always a problem.
The 5nm and even 3nm transistors are here already but the manufacturing process to (semiconductor device fabrication) is not ready yet. Although the 5nm TSMC is ready I guess but it is not in production yet.
Posted on Reply
#45
londiste
ratirt
Actually it has everything to do with the transistor itself not what's in the transistor.
The problem appears with the space between transistors. That is why you have EUV, DUV etc. techniques to connect the transistor together which is always a problem.
The 5nm and even 3nm transistors are here already but the manufacturing process to (semiconductor device fabrication) is not ready yet. Although the 5nm TSMC is ready I guess but it is not in production yet.
This is not right. Someone already linked to Wikipedia article about 7nm processes, I would narrow it down to this section:
https://en.wikipedia.org/wiki/7_nanometer#7_nm_process_nodes_and_process_offerings
Some of the parameters listed in the table - Transistor Gate Pitch, Transistor Fin Pitch, Transistor Fin Height, Minimum (Metal) Pitch are all parameters for physical size for various aspects of transistor components. Notably, these are all far bigger than 7nm.

Historically, the nm number in process name was gate length, then after some processes having just scaled numbered names half-pitch of memory cell was used and this again kind of goes out the window with FinFET at 14nm and smaller. Feature size (for couple/several different features) or resolution are the best generic descriptions of what the node number is about but even that is not accurate or true at this stage.
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#46
ratirt
londiste
This is not right. Someone already linked to Wikipedia article about 7nm processes, I would narrow it down to this section:
https://en.wikipedia.org/wiki/7_nanometer#7_nm_process_nodes_and_process_offerings
Some of the parameters listed in the table - Transistor Gate Pitch, Transistor Fin Pitch, Transistor Fin Height, Minimum (Metal) Pitch are all parameters for physical size for various aspects of transistor components. Notably, these are all far bigger than 7nm.

Historically, the nm number in process name was gate length, then after some processes having just scaled numbered names half-pitch of memory cell was used and this again kind of goes out the window with FinFET at 14nm and smaller. Feature size (for couple/several different features) or resolution are the best generic descriptions of what the node number is about but even that is not accurate or true at this stage.
I guess you are right. had an extensive read about this.
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#47
wiyosaya
So they expect increased competition for the next 18 to 24 months? It sounds to me that they could be planning a few toc steps without any tic steps. Interesting.
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#48
ppn
wiyosaya
So they expect increased competition for the next 18 to 24 months? It sounds to me that they could be planning a few toc steps without any tic steps. Interesting.
14nm refreshes of kaby, coffee +2C, coffeeR+2C and comet +2 cores are all optimisations of skylake, and much more.
ice lake is architecture on 10+, tiger is optimisation of ice lake on 10++, then again sapphire rapids would be a process 7+, so what other tocs are there other than tiger.
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#49
Smartcom5
Vya Domus
20 years ago there were dozens of IC manufactures that had leading nodes or close to them. Now you can count them on the fingers of one hand, you think anyone cared that all of these guys had reliable nodes up to the point when they couldn't compete?
I couldn't picture what you was talking about, and likely so did others. So I made it, hope you like it.

Vya Domus
The moment Intel resorts to other manufacturers it's over. There is a reason they are avoiding this like the plague and prefer to do nothing with regards to the shortages that they face and it's not due to their pride. The reason it's simple, so much of their cash and future product development is invested in their foundries it would probably sink them if they decide it isn't worth it any more, it's the same issue that nearly killed AMD many years ago. TSMC is the only viable manufacturer for leading nodes and there is no way they can sustain Intel's volumes, Intel is in really deep shit despite their efforts to appear calm.
So much this.

Smartcom
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#50
Nkd
R-T-B
CFL? That's CoffeeLake, right? There are quite a few gaming parts from that.



He put it down in the book of grudges.
Well obviously I made an error. I was referring to their 10nm desktop parts that trollmaster was referring to with 18% IPC increase. They are not going to be here until late 2020 at earliest.
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