Friday, July 3rd 2026
Intel Readies Two 22-Core "Nova Lake-S" SKUs with 108 MB bLLC Cache for Gaming
According to well-known Intel leaker Jaykihn, Intel is preparing two "Nova Lake-S" CPU models with a 22-core configuration, enhanced by the big Last Level Cache (bLLC). These processors are part of the Core Ultra 5 400S family, and Intel is developing two mid-range configurations, each with 22 cores. Both models will feature 6 "Coyote Cove" P-Cores, 12 "Arctic Wolf" E-Cores, and 4 LPE-Cores. This design includes a single compute die aimed at mid-range gaming rigs. Alongside the 22 cores, Intel plans to add an extra 108 MB of bLLC cache to boost gaming performance, similar to AMD's approach with its Ryzen X3D gaming CPUs, which currently lead in gaming performance. Intel aims to match raw CPU compute power with newer CPU cores and use bLLC to improve latency-sensitive tasks like gaming. The only difference between the two new models is that one is an unlocked 125 W TDP version, part of the "K" overclockable family, while the other is a 65 W base TDP model.
Recently, it has been observed that Intel's upcoming Z9x0 platform for "Nova Lake-S" will support up to 52 cores in a single LGA-1954 socket. Some early rumors suggest a PL2 power draw of 474 W, which is a significant increase over previous designs. This is understandable, considering that the design brings workstation-like core counts into the consumer sector for the first time. Regarding the socket, Intel's LGA-1954 has been pictured with a 2-lever independent loading mechanism (ILM), similar to what Intel's HEDT sector uses. This is typically reserved for larger CPU packages, and with the pin count now nearing 2,000 socket pins, it is a necessary choice for Intel. Importantly, the first "Nova Lake-S" CPU SKUs are scheduled for release in just a few months, likely leading to more rumors as we approach the final launch.
Source:
Jaykihn on X
Recently, it has been observed that Intel's upcoming Z9x0 platform for "Nova Lake-S" will support up to 52 cores in a single LGA-1954 socket. Some early rumors suggest a PL2 power draw of 474 W, which is a significant increase over previous designs. This is understandable, considering that the design brings workstation-like core counts into the consumer sector for the first time. Regarding the socket, Intel's LGA-1954 has been pictured with a 2-lever independent loading mechanism (ILM), similar to what Intel's HEDT sector uses. This is typically reserved for larger CPU packages, and with the pin count now nearing 2,000 socket pins, it is a necessary choice for Intel. Importantly, the first "Nova Lake-S" CPU SKUs are scheduled for release in just a few months, likely leading to more rumors as we approach the final launch.
279 Comments on Intel Readies Two 22-Core "Nova Lake-S" SKUs with 108 MB bLLC Cache for Gaming
I just saw some people say:
1 e core affects gaming performance, which is actually not the case.
2 e core ipc is very low, a few people here hold this view, which is actually not the case.
3 attack the intel hybrid method, but provided no evidence.
Given that all major silicon valley hardware companies use the hybrid method, it is no surprise that intel uses this method, and intel has done it very well.
e core improves MT performance well, and also improves gaming performance.
And chip area utilization is improved, which reduces intel's cost and gives you a better price, what more do you want.
4 claim that e core performance is weaker than p core, so it is not needed, but that is how hybrid works,
what do you expect, especially when the thread director ensures your foreground work runs on p core, heavy workloads run on all cores, background work runs on e core, and the main game thread prioritizes p core, how else do you want to schedule it?
Skymont IPC is 90% of Zen5 INT and 78% of Zen5 FPWhat IPC is real lol,
You are fabricating terms to defend AMD, which leads to linguistic corruption. If you want to call something else IPC as well, instead of claiming it is "real IPC," there is actually no need to use the term IPC at all.
What I have been talking about all along is SPEC2017 IPC, nothing else.
If the way you prove me wrong is not by proving that there is a problem with my data"Skymont IPC is 90% of Zen5 INT and 78% of Zen5 FP", but by saying that my IPC is not real, and yours are, this is very ridiculous and makes no sense.
Anyway, SPEC is still a benchmark widely recognized by the industry, which is not decided by you and me.I didn't say Zen 6 has no improvements. I said it's an 8% IPC gain for Zen 6 and a 20% IPC gain for the arcticwolf E-cores, based on leaks from MLID and Raichu respectively. Until Zen 6 and Nova Lake actually drop, this is all the info I've got. I'm not claiming it's absolute fact, it's just how I'm connecting the dots given the limited data. Whether you buy into this approach or not is none of my business. You're more than welcome to think I'm wrong I'm perfectly fine with that.Here I don't quite understand you. Zen5 DT cpu of course supports SMT, which is an important feature, especially since it only has 8 cores and needs to rely on SMT to expand MT performance. But at the same time, some people say MT is not important and gaming performance is more important, occupying an absolute position, so the 30% performance improvement of SMT is optional, and you only need to turn off SMT to get a 2% gaming performance improvement, testing based on TPU
SPEC measures overall performance, not IPC. I doubt if you have access to such equipment to measure IPC or whatever you call SPEC IPC. As for defending AMD, I have nothing to say, because it seems to me that it is the other way around because in the comment you yourself suggested disabling SMT on AMD processors, because they are bad for games, because as you know, games are single-thread limited.. Although the statements that SMT on AMD processors spoils gaming performance are completely false.
"IPC" isn't just a single static number. You can try to calculate the theoretical maximum IPC of a CPU for a given instruction and access patterns, and you can have the measured IPC which varies per application/workload pattern.
And most CPUs have performance counters that indicate IPC values and lots of other related metrics, such as:
IPC of 2.4 and 3.2 for the above silly examples.
There's just too many unknowns to be confident in which will be better overall, other than 52C NVL having the MT lead.
My comment about smt gaming is backed by TPU actual test results, do you have any.AMD is using a strategy similar to intel tick-tock in zen4/zen5/zen6. Zen4 and zen6 are minor IPC improvements + major clock increases. While zen5 is a major IPC improvement with almost no clock increase. With zen3 as 100%, zen4 is int 106.7% fp 110.7%, zen5 is int 118% fp 139%.
Zen6 just needs to lift some IPC like zen4 did, an increase of less than 10% is basically in line with expectations. I mean SPEC int/fp IPC, I don't care about other various IPC.
Zen6 reaching 6.5ghz looks very good, I think this is a bit optimistic computationally, but it is also highly possible, given that information from leakers has already been obtained, who knows.
For darkmont, I didn't originally think it would have an IPC increase, it is just what it is, an architecture that ports skymont from n3b to 18a. When intel makes such a process modification, or a simple cache change, they will also give it a new architecture name. Similar to cypress cove and sunny cove, golden cove and redwood cove, sunny cove and willow cove.
And darkmont still has 5%, which exceeds expectations. Because the e core team has stronger execution than the p core team, and the architecture itself also has more potential.
Arctic wolf is a 2-year IPC improvement cycle, and such changes have happened many times for e cores. the evolutionary history of this architecture is also why people have confidence in it. silvermont 50%, tremont is 30%, gracemont 25%? skymont is int 22% fp 48% with ring (intel claim 38% and 68% for lp-e core without ring)
And I have already lowered expectations, estimating that the arctic wolf 20% IPC is for over skymont rather than darkmont.
As stated, E-cores have weak front-ends and share cache, and only work well with async workloads. Most "IPC" estimates are based of batch loads, and synchronization isn't even a part of it. Most of what a game engine does is highly synchronized. The only way E-cores will help gaming is by offloading other work to E-cores so the P-cores are less "interrupted" by background tasks.
1) 8P cores at 4700 MHz
2) 1P core at 800 MHz (impossible to eliminate P cores more than this) and 16 E cores at 4700 MHz
3) Default (8P at 5400 MHz and 16E at 4700 MHz).
The results:
8P cores at 4700 MHz:
1P core at 800 MHz and 16 E cores at 4700 MHz:
Default (8P at 5400 MHz and 16 cores at 4700 MHz:
Are the E cores really that unusable for gaming, as you are trying to claim? What did you base your claim on?
www.techpowerup.com/review/intel-core-i9-12900k-e-cores-only-performance/
No need to post your fantasies about e-cores replacing p-cores in 1-IPC workloads. Even the developers of these cores would never say that.
I believe that the rendering resolution of the benchmark I ran was 1080p, and the P cores running at the same frequency as E cores were just 5% better. The game ran perfectly smoothly with E cores, you see no significant dip in min FPS.
TPU review with an older generation CPU showed much larger difference at this resolution, something like 30%.
BTW the extra slow P core may have just worsened the performance and the E cores alone could have performed even better without it. In each case, I removed 98% of the computing power of the P cores in the E core test.
Regarding cache bandwidth and latency, you are right. intel uses a hybrid design, and it is enough for the e core to do its part. I did not discuss the e core performing better than the p core, tasks not suitable for the e core are handed over to the p core.
What I was talking about was the IPC of the e core in SPEC 2017, which looks very suitable for the tasks you mentioned that the e core is good at. Then we are in agreement.This test is outdated, as 1314gen e core has been enhanced and windows has improved scheduling. In the 1314gen or newer tests, e core can improve gaming performance.
If your mindset is still stuck in 2021, you might want to update it.
Stephen Robinson: Yes, I didn't say
It seems they improved them a lot.
chipsandcheese.com/p/disabling-zen-5s-op-cache-and-exploring
This other 4-wide is useless when we discuss the situation where cpu cores do not handle high-parallel tasks
You cannot simply post the article without doing any analysis, in my view, the article actually does not contradict my comment.
But you really exposed a lot, calling e core a real physical core intel's marketing, while amd 4-wide decode only works in smt logical threads. The quality of smt is much lower than the e core threads provided by intel, and the quantity is 1/2 of intel e core.
Using your logic: is smt amd's marketing vomit? Why do people need smt, it is completely useless, I only need to play games, this kind of low-quality thread will be scheduled on my tasks, only disrupting my applications.
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Even the smt performance provided by amd's most advanced zen5 core does not exceed what intel's first-generation e core can offer, let alone the latest skymont which provides performance very close to a p core.
You cannot provide any evidence other than the game benchmarks from when intel just released hybrid. I brought up 3 newer game tests based on 13gen and arrowlake, yet you say it is irrelevant? Then why did you post the TPU test from 2021, it makes absolutely no sense.
What I wrote in the third post here:could be correct and this midrange 18 core CPU (not counting LPE cores) may actually crush the best what is now available both from Intel and AMD.
www.techpowerup.com/review/rtx-4090-53-games-core-i9-13900k-e-cores-enabled-vs-disabled/
This guy @tsurugi is just trying to fool everyone with Intel's marketing vomit and doesn't see a problem with it. I suggest we stop this pointless discussion of rumors and things that don't exist - when e-cores cores become the new P-cores, we'll see them as such. For now, it's just more junk with a different architecture, instruction set, etc., and limited use in desktop applications.