Wednesday, September 9th 2026
CXMT Reportedly Struggles With HBM3E, Yields Are Only 25%
Chinese memory giant CXMT is reportedly facing difficulties with HBM3 production, according to South Korean media. Late last month, it was revealed that CXMT had begun risk production of HBM3E memory, lagging two generations behind Samsung, SK hynix, and Micron, who are already progressing with HBM4E sampling. At that time, it was known that the company was conducting HBM3E risk production in limited runs, but details were scarce. However, today we learn that three out of four HBM3E stacks are defective, indicating that CXMT currently operates at a 25% yield. Stacking DRAM is a complex task, as the technology required is much more intricate than planar DRAM manufacturing, an area where CXMT reportedly excels.
The low yields are reportedly due to the immaturity of the through-silicon via (TSV) technology that CXMT employs. In front-end manufacturing, CXMT achieves around 30% yields, while back-end processing yields about 70% on top of the original 30%. For instance, Samsung uses about 5,000 TSVs per layer on HBM2, and SK hynix uses more than 8,000 TSVs per layer on its HBM3. However, data suggests that CXMT is attempting to achieve HBM3E with only 3,000 TSVs per layer and is trying to pack 8 layers in the regular 8-Hi HBM3E configuration. Given these challenges, the company is unlikely to transition to a higher-capacity 12-Hi HBM in the near term as it addresses engineering challenges.
Despite these setbacks, it is too early to declare CXMT's efforts a failure. For example, Samsung reportedly had about a 60% yield for HBM4 in February of this year and now has about 80% just six months later. There is still room for CXMT to grow and improve. For regular planar DRAM, CXMT already achieves a 90% yield, which is only 2-3% lower than Samsung's yield on its 10 nm class node for DDR5 production. This suggests there are ways to catch up, but CXMT still needs time to refine the process. Using TSVs to stack DRAM requires substantial expertise, and it will take a few months before volume production can begin.
Source:
Chosun
The low yields are reportedly due to the immaturity of the through-silicon via (TSV) technology that CXMT employs. In front-end manufacturing, CXMT achieves around 30% yields, while back-end processing yields about 70% on top of the original 30%. For instance, Samsung uses about 5,000 TSVs per layer on HBM2, and SK hynix uses more than 8,000 TSVs per layer on its HBM3. However, data suggests that CXMT is attempting to achieve HBM3E with only 3,000 TSVs per layer and is trying to pack 8 layers in the regular 8-Hi HBM3E configuration. Given these challenges, the company is unlikely to transition to a higher-capacity 12-Hi HBM in the near term as it addresses engineering challenges.
20 Comments on CXMT Reportedly Struggles With HBM3E, Yields Are Only 25%
CXMT may be overextending themselves when ample opportunity to undercut, corner, and dominate the market for (LP)DDR4 and (LP)DDR5, exists.
I may be a know-little American but, most other DRAM manufacturers have supposedly repurposed their manufacturing space towards HBM.
Why not flood the market with non-HBM DRAM? -Has that not been 'the strategy' of Chinese silicon upcomers in decades gone-by?If CXMT can become the sole-cause for xDDR# DRAM products returning to 'normal pricing' for consumers, prosumers, and small-scale biz- I'd be happy to celebrate them.
And when the bubble pops he big ones will ramp up their regular ram production because demand for hbm will be a lot lower.
Just imagine having HBM being offered in high end xx90 class hardware. I can imagine nVidia actually wanting it as it reduces board sizes even further for them.
-though, it'll probably look something awful like the post-2000s Web into the 20teens-Today's: handful of players own virtually everything, all running on one-few's infastructure.Unlike traditional 2D DRAM, HBM is not-so universally compatible and is absolutely un-reusable once bonded to the die/interposer of the destined GPU, ASIC, etc.
Should Industry-specific demand for HBM reduce, fabs will just 'write off' (or, sue for breach of contract) whatever cannot be sold, and go back to making more traditional commodity DRAM.
I really want to imagine that but, I can't imagine the market forces that would facilitate HBM's to return to the consumer space. Even regulations and/or industry standards demanding maximally-effcient consumer GPUs, wouldn't. We'd just have an even bigger delta between what Big Data and The Individual can own/purchase.
I'd be happy to be proven wrong, ofc...
All dynamic RAM is basically the same technology. If HBM and DDR5 and possibly LPDDR and GDDR dies are made on the same node (say 1b), switching between them should be very quick. So CXMT may be spending time perfecting the HBM but then they will produce whatever is most in demand. I'm talking about memory dies here, advanced packaging is a separate story.
They are all going after enterprise business, that's where the big $ are, so they would be pretty dumb to flood the market with RAM and lower prices, if anything, they will go after what makes them the most $
*Japan, South Korea, Taiwan (RoC), Thailand, Malaysia, Vietnam, etc.
a silly 8GB Raspberry pi 5 is now €200.
those little boards were meant to tinker with at home for little money product is pretty much dead to that market
anyway, that was before, now, it's a whole new ballgame, and you can clearly see that they are not undercutting anyone now, their RAM is just as expensive as the big 3 outside of ChinaHow will it exactly? as I said above, the prices that they are charging now isn't undercutting anyone outside China, they just charge what everyone else is charging
Demand is crazy, all the current fabs are booked solid for years now, and they still want more, so, in theory, if they would be able to flood the global market with RAM, it still wouldn't drop prices, it would be dumping and lawsuits would be flying all over the place from a ton of countries & companies
as for the pi 5, yeah, I know all about it, and it sucks, but, they do got an out, they can contract with some of the older fabs that can't produce DDR4/5 and go back to legacy DRAM and make a pi using that for much lower costs, (or I suppose start ordering parts again for the Raspberry pi 3) and it will be much cheaper than the pi 5
heck, they might even be able to convince Broadcom to make a special SoC that is just as fast as the current BCM2712, but using legacy RAM
When AMD did VEGA it was because the cost of the HBM that then wasn't horrendous as there wasn't a suitable market for it at the time. Professional cards needed larger capacities than what was available at the time via HBM so it fell down to consumers first.
I can imagine nVidia wanting it possibly for it's xx90/Titan class cards just because of the board space saving meaning thinner/shorter boards are possible again while keeping capacities high.
Until the AI Boom/Rush is over though that's very much pipedream talking.
I could also see HBM being considered for like a L4 cache on extremely dense core designs to alleviate memory controller bandwidth limitations.
& If etc Kingston proclaimed they will cater only to gamers they would generate decades of customer loyualty & goodwill & smaller peripheral makers wouldnt go bankrupt.
Hopefully A.I. has finished calculating soon so we can go back to business..