The NVIDIA GeForce RTX 3060, a mid-range GPU now two generations old, is reportedly returning to NVIDIA's supply this month. According to Chinese Board Channels, NVIDIA is planning a mid-March restock of the "Ampere" GPU, aligning with earlier rumors that suggested a Q1 2026 revival. Interestingly, it is unclear which version of the RTX 3060 will be reintroduced—whether it will be the original 12 GB model with a 192-bit wide memory bus or the newer 8 GB variant with a 128-bit bus. NVIDIA's decision to bring back this older SKU is puzzling, especially considering it is two generations old and comes amid memory supply chain shortages. However, this older SKU uses GDDR6 memory, which might be more readily available as the newer GDDR7 is being used by modern "Blackwell" GPUs and the upcoming "Rubin CPX" accelerators.

Why NVIDIA has chosen the RTX 3060 instead of a newer model like the RTX 4060 remains uncertain. Speculatively, it could be due to the fact that the RTX 4060 is based on the same NVIDIA 4N foundry node at TSMC as the current RTX 5060, while the RTX 3060, along with the rest of the GeForce "Ampere" generation, is built on the Samsung 8N (8 nm DUV) foundry node. Additionally, Board Channels note that GeForce RTX 3060 models from various brands will start arriving soon, which means NVIDIA's add-in card partners are doing much of the heavy lifting to bring back this SKU, with NVIDIA only supplying the GPU die and memory as an installation kit. AICs could start marketing this GPU again or just quietly add it to their websites. We are waiting a few more days to see how the re-launch unfolds and which SKUs we end up getting. Finally, the most important factor for considering this GPU when modern alternatives exist is the pricing, which will dictate its sales.

The memory procurement market has adopted a new business model with hourly contracts, where quoted prices are valid for only a single hour, necessitating a new pricing quote with each change. Memory makers like SK hynix, Samsung, and Micron are responding to the massive demand for their memory solutions with new types of contracts that force OEMs to make quick decisions to procure DRAM within a very short timeframe. This means that memory makers are requiring much faster contract settlements, as the rapid increase in demand is causing product pricing to change literally by the hour. For example, large PC OEMs, who are among the biggest customers, now have to ship PCs with one pricing, while their future products are subject to price changes that fluctuate by the hour. How sustainable and stable this market will be remains to be seen.

Interestingly, the customer DRAM market is splitting into two camps. A short list of deep-pocketed customers, including large cloud providers, major automakers, and top smartphone firms such as Apple and Samsung Electronics, retain priority access to DRAM and the best pricing negotiation leverage. Memory manufacturers like SK hynix and Micron are said to prioritize these relationships above all else by favoring buyers who can prepay or settle in cash. For the vast remainder, more than 190,000 small and medium enterprises, the situation is harsher. Many lack the cash flow and bargaining leverage to accept rapid price jumps. As costs climb, some firms are revising demand forecasts downward to avoid margin erosion. Demand outside of the hyperscaler/data center sector may be revisited downward for many companies, as consumers are less keen on spending more on products that are becoming more expensive each day.

The global NAND Flash industry continued to benefit from AI infrastructure build-outs in 4Q25, according to TrendForce's latest research. All in all, the combined revenue of the top five NAND flash suppliers sharply rose 23.8% QoQ to US$21.17 billion.

The primary growth driver was explosive demand for enterprise SSDs, fueled by large-scale AI server deployments by North American CSPs. Meanwhile, severe HDD shortages and extended lead times accelerated a shift in orders toward NAND solutions, which further tightened supply. The resulting imbalance worsened NAND shortages and pushed prices higher, directly boosting supplier revenues.

NVIDIA has reportedly lowered its performance requirements for the HBM4 memory used in "Rubin" GPUs, as SK hynix and Samsung are reportedly struggling to meet the ambitious performance targets set by NVIDIA. According to a new note from SemiAnalysis, NVIDIA is reducing its specification requirements for the upcoming GPU generation. Originally, NVIDIA targeted a total bandwidth of 22 TB/s for the Rubin chip, but memory suppliers seem to be having difficulty meeting these requirements. Initial shipments are expected to achieve closer to 20 TB/s, which translates to approximately 10 Gbps per pin for HBM4. This indicates that NVIDIA's aggressive upgrade plan for "Vera Rubin" is facing a setback, and the final performance will differ slightly.

Interestingly, NVIDIA's initial target for the "Vera Rubin" VR200 NVL72 system was 13 TB/s in March 2025, which was later upgraded to 20.5 TB/s by September. At CES 2026, NVIDIA confirmed that the VR200 NVL72 system is now operating at 22 TB/s of bandwidth. Compared to AMD's Instinct MI455X accelerator, which has 19.6 TB/s, NVIDIA initially had lower system bandwidth. They addressed this by using faster DRAM and improving interconnects between CPUs, GPUs, and the entire system. However, as memory makers like SK hynix and Samsung struggle to meet NVIDIA's performance requirements, we will see HBM4 speeds of about 20 TB/s for the entire "Vera Rubin" system.

Samsung is overhauling the power delivery network in its HBM4E memory to tackle what's becoming one of the bigger engineering headaches in next-gen AI chips. This comes just two weeks after the company shipped its first commercial HBM4, already pushing 11.7 Gbps consistently with headroom up to 13 Gbps. As designs move from HBM4 to HBM4E, the number of power bumps grows from 13,682 to 14,457, packed into the same space with thinner, denser wiring. That drives up current density and resistance, causing IR drop (voltage weakens as it travels through the circuits) while the heat generated in the process makes things worse, creating a feedback loop that can affect performance or even cause circuit failure.

To fix this, Samsung segmented the power network. The large centralized MET4 power block on the base die, previously laid out in big honeycomb-like sections near the interposer, has been split into four smaller sections, with upper layers further broken up to reduce congestion and shorten routing paths. According to Samsung, the results were significant, metal circuit defects dropped 97% compared to HBM4, and IR drop improved by 41%, giving the chip more voltage headroom for higher speeds and better reliability.

Samsung Display participates in MWC26, the world's largest mobile communications exhibition, held in Barcelona, Spain from March 2 to 5. Marking its fourth consecutive year at the event, Samsung Display showcases a broad portfolio of OLED technologies that serve as both interfaces and component solutions optimized for AI edge computing. Notably, reflecting the growing importance of smartphone privacy alongside enhanced AI capabilities, the company has unveiled the "Flex Magic Pixel" zone, presenting its breakthrough panel-integrated privacy technology that demonstrates its OLED innovation to a global audience.

Under this year's exhibition theme, "The IQ Era," Samsung Display has designed its booth around the concept of "Intelligent OLED City." The booth is organized into four zones: AI Square, AI Edge District, AI Entertainment District and AI Sports District.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of its highly anticipated JESD220H and JESD223G: Universal Flash Storage 5.0 and UFS Host Controller Interface (UFSHCI) 5.0. Designed for mobile applications, automotive and computing systems that demand high performance with low power consumption, UFS 5.0 will deliver faster data access and improved performance compared to its predecessor while maintaining compatibility with UFS 4.x hardware.

UFS offers high-performance, embedded storage with low power consumption, making it ideal for use in applications where power efficiency is essential. This includes computing and mobile systems like smartphones and wearables, as well as an expanding role in generative AI, automotive applications, edge computing and gaming consoles. Its high-speed serial interface and optimized protocol enable significant throughput for power-efficient system performance.

TrendForce's latest findings reveal that the expansion of AI applications from LLM training to inference has prompted CSPs to broaden data center build-outs beyond AI servers to include general-purpose servers. This shift has extended memory procurement beyond HBM3e, LPDDR5X, and high-capacity RDIMMs to RDIMMs across multiple densities. Aggressive additional orders have driven a sharp increase in conventional DRAM contract prices, lifting total DRAM industry revenue to $53.58 billion in 4Q25, up 29.4% QoQ.

Across segments, buyers have struggled to secure sufficient supply amid a widening supply-demand gap. This has significantly strengthened suppliers' pricing power. Conventional DRAM contract prices rose 45-50% QoQ, while blended contract prices for conventional DRAM and HBM increased 50-55%, marking an accelerated upswing across all product categories.

Samsung Electronics Co., Ltd. today introduced its latest Galaxy Buds4 Pro and Galaxy Buds4, redefining what premium earbuds can deliver in both superior Hi-fi audio and everyday wearability. Built to sound as good as they feel, the Galaxy Buds4 series pairs exceptional sound quality with a more refined, computationally designed fit, bringing Samsung's most advanced audio and wearability innovations together in one seamless experience. For the first time, Buds4 Pro features a Super Wide Woofer, combined with enhanced Active Noise Cancellation (ANC) and an enhanced Adaptive Equalizer (EQ), to supply full-spectrum sound true to the original recording—while intelligently adapting to real-world conditions. Thoughtful design updates, intuitive hands-free controls, and deeper AI integration further underscore Samsung's commitment to earbuds designed for how people listen, move, and live throughout the day.

"Samsung understands that a truly premium audio experience combines technical sound quality with how that sound feels throughout a user's day," said Ikhyun Cho, Corporate VP of Mobile Enhancement R&D Team, Mobile eXperience. "With the Galaxy Buds4 series, our design philosophy was uncompromising, providing all-day comfort without sacrificing audio performance, because these are what consumers value most. We engineered our most powerful Hi-fi audio and our most secure, ergonomic fit to enhance one another, delivering the best and most satisfying listening experience we've ever created."

Samsung Electronics today announced the Galaxy S26 series, powered by the most intuitive, proactive and adaptive Galaxy AI experiences yet and designed to simplify the tasks people do on their phones every day. From managing plans and finding information to capturing and refining content, Galaxy S26 reduces the effort and number of steps required to get things done. As Samsung's third-generation AI phones, Galaxy S26, S26+ and S26 Ultra handle complex tasks in the background, allowing users to focus on results rather than how the technology works.

The Galaxy S26 series was engineered with Samsung's most advanced capabilities working together as one: incredible performance, an industry-leading camera system and Galaxy AI. This provides a strong foundation that gives Galaxy S26 users the confidence to depend on their phone throughout the day without compromising security or privacy.

Samsung is officially ending the production of its 2D NAND flash storage this year, and the company will be repurposing its old production lines to better fit the AI-driven demand. According to The Elec Korea, Samsung plans to officially stop 2D NAND production at its Hwaseong site, with Line 12 being the one carrying this aging technology. Instead of completely abandoning this facility, which houses plenty of chip-making tools, Samsung will repurpose them for DRAM metallization, which is the process of applying actual pathways within the DRAM itself to connect memory cells. Interestingly, the Hwaseong Line 12 holds a monthly wafer production capacity of 80,000 to 100,000 12-inch wafers. This is a significant number of wafers, which are now only used for 2D NAND Flash, a technology that is no longer needed in the wake of 3D NAND Flash technology.

Continuing the Line 12 legacy will be Samsung's 6th-generation 10 nm-class 1c DRAM, a technology used for HBM4, and Samsung expects the total wafer capacity for 1c DRAM to reach about 200,000 wafers per month in the second half of the year. Adapting the old 2D NAND Flash production site will definitely help, and Samsung will run this production along with Pyeongtaek Line 3 and Line 4.

Samsung Foundry has struck gold as its utilization rate has jumped to an impressive 80% this quarter. This comes after many years of struggling to achieve a good utilization rate, while competitors like TSMC have consistently led the adoption of newer nodes and gained a massive customer base. However, the situation has now changed, and Samsung's foundries are now operating at about 80% of total capacity, consistently producing silicon, with the Pyeongtaek Campus P2 and P3 leading the charge. Previously, these lines were only achieving a 50% booking rate last year and even struggled with insufficient production volume in the second half of 2024. Samsung uses these sites to manufacture 4 nm, 5 nm, and 7 nm nodes, which are now considered "mature," as the leading edge shifts to sub-3 nm production.

Part of the foundry revival is attributed to the strong demand for its 6th-generation HBM, coming in the form of HBM4 with a custom base die manufactured on the 4 nm node. While competitors are making HBM4 base dies on older nodes, Samsung is using a 4 nm custom base die that provides higher design density for any logic that ASIC makers want to implement. This can include some data processing that will aid the main accelerator in AI workloads. This has translated into high demand for Samsung Foundry products from external customers, who are now keeping production at high capacity.

A Lenovo product manager on Chinese social media held up what is possibly the highest capacity and highest speed LPCAMM2 module. An LPCAMM2 is a SOCAMM2 module that uses LPDDR5 or LPDDR5X DRAM. It is replaceable, unlike traditional LPDDR implementations that see the DRAM chips hardwired to the notebook's mainboard. Pictured here, is a new Samsung LPCAMM2 that offers 96 GB of density with a speed of LPDDR5X-9600. This speed is natively supported by Core Ultra Series 3 "Panther Lake" mobile processors, or at least the Core Ultra X7 and X9 brand extensions. It not for the acute DRAM supply crisis, the mid-2020s were expected to see a rise in PC mainstream memory densities.

MSI announced today it is strengthening its strategic partnership with Samsung Display. Following Samsung Display's reveal of the QD-OLED Penta Tandem technology brand, MSI confirms it had already begun integrating this exclusive 5-Layer Tandem QD-OLED into its monitor lineup in early 2025 to deliver the industry's premier visual experience for gamers.

Penta Tandem Technology: MSI's Core Advantage
The newly launched Penta Tandem brand from Samsung Display represents a significant breakthrough in QD-OLED technology. By utilizing a 5-layer stack structure in the blue emitting layer and optimizing organic materials, this technology effectively disperses energy to improve brightness, lifespan, and luminous efficiency.

TrendForce's latest analysis of the HBM industry reveals that as the ongoing expansion of AI infrastructure continues to fuel GPU demand, NVIDIA's upcoming Rubin platform is expected to become a major catalyst for HBM4 adoption once mass production begins. The three leading memory suppliers—Samsung, SK hynix, and Micron—are now in the final stages of HBM4 validation, with completion anticipated by 2Q26.

Samsung, supported by its strong product stability, is projected to secure certification first. SK hynix and Micron are expected to follow shortly thereafter, forming a three-supplier ecosystem for NVIDIA's HBM4.

Late last October, Qualcomm revealed its AI200 and AI250 chip-based accelerator cards, and racks. Oddly, the company's press material mentioned the utilization of Low-Power DRAM (LPDDR) memory rather than in vogue High Bandwidth tech (HBM)—the latter has quickly become the de facto choice for cutting-edge AI-crunching enterprise platforms. Modern types of LPDDR memory are normally found in portable devices powered by Qualcomm chipsets, but the San Diego-headquartered fabless semiconductor firm seems to be exploring the deployment of LPDDR6X modules in server-grade equipment. According to inside track information—published by The Bell South Korea—Samsung Electronics has reportedly sent prototype LPDDR6X samples of to the House of Snapdragon chips.

One of The Bell's anonymous industry sources opined that this move was a little bit out of the ordinary; given that the LPDDR6 (non-X) standard received official JEDEC certification not that long ago (Q3 2025). The still in-progress Samsung LPDDR6X development project has been linked to Qualcomm's 2027 launch of the AI250 inference-focused server platform. The publication's official contact believes that a tight AI200-series release roadmap has prompted the very early supply of LPDDR6X modules. Last month, rumors emerged about the AI200 and AI250 inference accelerators being sized up with SOCAMM2 in mind. In December, the Samsung Memory Product Planning Team divulged forthcoming branches of non-X tech—most notably that "low-power DRAM technologies such as SOCAMM" are being spun-off from "AI-focused module solution(s) leveraging LPDDR6 architecture."

Samsung Display unveiled 'QD-OLED Penta Tandem,' a new premium technology brand built on its proprietary five-layer organic light-emitting structure, a core innovation unique to its QD-OLED panels. Samsung Display announced that it has completed trademark registration for the new brand, created to highlight the distinctive value of its five-layer organic light-emitting structure applied to QD-OLED panels for premium monitors and TVs. "Penta" comes from the Greek word for the number five.

QD-OLED expresses color using quantum dots that respond to light, with the blue emitting layer serving as the light source due to its high energy within the visible spectrum. Beginning last year, Samsung Display advanced the blue emitting layer stack from four layers to five, and applied the latest organic materials, completing a new generation of QD-OLED that delivers superior picture quality, efficiency, and peak brightness.

Samsung Electronics Co., Ltd., a global leader in advanced memory technology, today announced that it has begun mass production of its industry-leading HBM4 and has shipped commercial products to customers. This achievement marks a first in the industry, securing an early leadership position in the HBM4 market. By proactively leveraging its most advanced 6th-generation 10 nanometer (nm)-class DRAM process (1c), the company achieved stable yields and industry-leading performance from the outset of mass production—all accomplished seamlessly and without any additional redesigns.

"Instead of taking the conventional path of utilizing existing proven designs, Samsung took the leap and adopted the most advanced nodes like the 1c DRAM and 4 nm logic process for HBM4," said Sang Joon Hwang, Executive Vice President and Head of Memory Development at Samsung Electronics. "By leveraging our process competitiveness and design optimization, we are able to secure substantial performance headroom, enabling us to satisfy our customers' escalating demands for higher performance, when they need them."

TrendForce's latest smartphone industry research predicts that soaring memory prices are set to weigh heavily on global smartphone production in 2026. Total output is forecast to decline 10% YoY to approximately 1.135 billion units. With memory prices showing no clear signs of easing, the growing gap between higher retail prices and consumer price tolerance is expected to further dampen end demand.

Under a bear-case scenario, TrendForce warns that the annual contraction in global smartphone production could widen to 15% or more. The extent of the impact, however, will vary by brand, depending on differences in product mix and regional exposure.

South Korean memory makers, SK hynix and Samsung, are preparing to showcase their next-generation LPDDR6 memory solutions at the International Solid-State Circuits Conference (ISSCC) 2026 in San Francisco, which will take place from February 15-19. As the premier event for showcasing advancements in silicon design, South Korean makers will present their best new technologies. For SK hynix and Samsung, this includes an update to their low-power DDR memory, now in its 6th generation. The LPDDR6 modules from SK hynix will arrive in 16 Gb capacities and offer a transfer rate per pin of 14.4 Gbps, built on the 1c generation (1γ generation) semiconductor node, which is the company's 6th generation of 10 nm DRAM. SK hynix runs these new modules at JEDEC's highest LPDDR6 speeds, meaning that the company is close to maxing out the new technology, and overclocked LPDDR6X versions might be arriving soon.

Samsung, on the other hand, has improved its LPDDR6 since the original CES 2026 presentation. The company will now present its 16 Gb LPDDR6 modules running at 12.8 Gbps, which is a significant improvement over the 10.7 Gbps modules from a few weeks ago. Samsung reportedly manufactures this LPDDR6 memory on a 12 nm process, which is slightly larger than SK hynix's 10 nm, but these modules also deliver great benefits. The company claims a 21% improvement in energy efficiency over its predecessor LPDDR5X. Additionally, Samsung's LPDDR6 memory uses NRZ signaling for I/O with a 12DQ subchannel, while SK hynix modules likely follow suit.

Samsung is readying its Exynos 2600 application processor (AP) for a late February debut in next-gen Galaxy S26 smartphone models. Recent promotional fanfare has focused on the South Korean semiconductor giant's 2 nm GAA process (SF2), but early 2026 leaks have suggested work continuing on two futuristic fronts—a more advanced manufacturing process (SF2P), and the mysterious Exynos 2700 mobile processor design. Earlier today, Park Yu-ak of Kiwoom Securities made a bold prediction about Samsung's next-gen AP design: "the Exynos 2700 will enter full-scale mass production in the second half of this year using Samsung Foundry's SF2P process and will record a market share of around 50% in the Galaxy S27."

Currently, smartphone industry experts believe that Exynos 2600 chipsets will only deploy in 25% of the soon-to-be-launched Galaxy S26 series. The remaining share will be powered by Qualcomm's Snapdragon 8 Elite Gen 5 "for Galaxy" SoC. Samsung leadership is very likely pursuing a more favorable spread of in-house technologies, as future Exynos designs become more competitive in a bustling market. Mixed rumors of 2 nm GAA node production yields have somewhat dampened expectations of the South Korean megacorp's foundry business, but the latest Kiwoom Securities forecast outlines a cool operating profit of 1.8 trillion won by 2027 for Samsung Electronic's non-memory division. Within the past month or two, industry insiders have whispered about potential SF2 and SF2P deals being signed in the same sentence as AMD, Qualcomm, and Tesla.

The next major refresh of AMD's Ryzen AI MAX APUs is still far away, but now we are putting together the pieces of the "Medusa Halo" APU puzzle. According to a famous leaker, @Olrak29_ on X, AMD's next-generation "Medusa Halo" APU will be complemented by LPDDR6 memory. This is one of the first LPDDR6 memory SoCs we are learning about, making it unique. Based on previous rumors, the silicon could have a 384-bit bus powering LPDDR6 memory, which would translate into massive bandwidth powering the SoC's new CPU and GPU configuration. This includes up to 24 "Zen 6" CPU cores and 48 RDNA 5/UDNA compute units for the GPU configuration. Paired with the added bandwidth from LPDDR6 memory—which these APUs greatly benefit from—"Medusa Halo" will be one of the best-performing SoCs when it launches.

Interestingly, memory manufacturers like Samsung and Innosilicon are already supplying LPDDR6 modules to customers for validation. Innosilicon's LPDDR6 modules boast an impressive speed of 14.4 Gbps, significantly faster than Samsung's initial modules, which achieve 10.7 Gbps. Innosilicon's modules offer a 1.5x increase in IO speed capability compared to the 9.6 Gbps of LPDDR5X previously available, along with improved efficiency. The latest LPDDR6 also increases the number of bits per byte of IO from 8 to 12. This results in LPDDR6's bandwidth at a single-channel 24-bit I/O speed being double that of LPDDR5X at a 16-bit single-channel. The company is reportedly collaborating with TSMC and Samsung to ensure sufficient production capacity for LPDDR6 IP, while Samsung relies on its own fabs for manufacturing memory.

As the news cycle approached Christmas (2025), rumors emerged of other smartphone chip manufacturers considering an adoption of Samsung's intriguing "Heat Path Block" (HPB) technology. By the middle of January, the Fixed-focus digital cameras Weibo account surmised HPB being picked up by "many chip manufacturers that commonly use Android chips." Earlier today, a leaked "SM8975" packaging set of schematics seem to show Qualcomm's integration of a Samsung-designed Heat Path Block into a next-gen Snapdragon mobile chipset. The latest finding—again, courtesy of Fixed-focus digital cameras—indicates the speculative Snapdragon 8 Elite Gen 6 Pro model borrowing a key piece of heatsink technology from Samsung's soon-to-be-launched Exynos 2600 SoC.

By the end of last week, multiple news articles claimed that Qualcomm was borrowing the HPB design from an arch-rival. The San Diego, California-headquartered fabless semiconductor specialist's recent flagship processors have enjoyed high placements in terms of benchmark results, but these cutting-edge chips have seemingly hit thermal limit barriers—even when combined with expensive vapor chamber-based cooling solutions. Samsung Foundry's HPB is placed over and in contact with the chipset die, without any blockage (unwantingly) enabled by a layer of DRAM. Instead, the latter aspect is moved to the side (refer to the fourth image below). Reports from late last year mentioned Qualcomm and Apple being the two main (external) frontrunners of HPB adoption, outside of Samsung pioneering the way with its 2-nanometer Exynos 2600 application processor.

NVIDIA's upcoming "Vera Rubin" AI systems are scheduled for late summer shipping in the form of VR200 NVL72 rack-scale solutions that will power the next generation of AI models. However, not every memory maker of HBM4 qualified for a design win, as Micron has reportedly fallen out of the equation, with only Samsung and SK hynix left to supply the precious HBM4 memory. According to leaked institutional notes from SemiAnalysis, which tracks the supply chain in great detail, SK Hynix will represent about 70% of the HBM4 supply for VR200 NVL72 systems, with Samsung getting the remaining 30% of the supply. For a major memory maker like Micron, there is reportedly zero commitment for the supply of HBM4 memory.

Interestingly, this is not the end of Micron's share of memory in NVIDIA VR200 NVL72 systems. Instead of HBM4, the company will supply LPDDR5X memory for "Vera" CPUs, which can be equipped with up to 1.5 TB of LPDDR5X, making up for the lost share with the HBM4. It is possible that Micron didn't qualify for the significant system upgrade that NVIDIA performed for VR200 NVL72, which went from the initial system target of 13 TB/s in March 2025 to 20.5 TB/s in September. However, at CES 2026, NVIDIA confirmed that the VR200 NVL72 system is now operating at 22 TB/s of bandwidth, marking a nearly 70% increase in system bandwidth, all derived from aggressive memory specification scaling that the company demanded from the memory makers.

According to Nikkei Asia, some of the biggest PC makers like ASUS, Acer, Dell, and HP are exploring alternative memory suppliers amid industry-wide memory shortages, which are forcing PC OEMs to seek supply even from Chinese memory maker CXMT. Late last year, CXMT unveiled its homegrown DDR5-8000 and LPDDR5X-10667 memory modules at the 2025 China International Semiconductor Expo. This has likely prompted many OEMs to start finding alternatives to the traditional triad of SK Hynix, Samsung, and Micron, whose supply has been very limited outside AI accelerator workloads.

CXMT offers 12 Gb and 16 Gb LPDDR5X capacities, while DDR5 scales to 16 Gb and 24 Gb module formats. The 16 Gb DDR5 chips from CXMT measure 67 square millimeters, with a density of 0.239 Gb per square millimeter. The G4 DRAM cells are 20% smaller than CXMT's previous G3 generation. Reportedly, CXMT manufactures these chips using a 16 nm node, which is three years behind Samsung, SK Hynix, and Micron in manufacturing capabilities. However, CXMT is progressing quickly, and its DRAM modules adhere to the official JEDEC specifications and even exceeding the specification, making them ideal for OEM PCs depending on the use case.